System Verilog: Coverage

1. Where do you put your cover group in your code? How do you instantiate it?

Answer:
example

class driver;
stimulus sti;
Scoreboard sb;

covergroup cov;
Feature_1: coverpoint sb.store ;
Feature_2 : coverpoint sb.store { bins trans = ( 15 => 0) ;}
endgroup

virtual intf_cnt intf;

function new(virtual intf_cnt intf,scoreboard sb);
this.intf = intf;
this.sb = sb;
cov = new();
endfunction

task reset(); // Reset method
intf.data = 0;
@ (negedge intf.clk);
intf.reset = 1;
@ (negedge intf.clk);
intf.reset = 0;
@ (negedge intf.clk);
intf.reset = 1;
endtask

task drive(input integer iteration);
repeat(iteration)
begin
sti = new();
@ (negedge intf.clk);
if(sti.randomize()) // Generate stimulus
intf.data = sti.value; // Drive to DUT
sb.store = sb.store + sti.value;// Cal exp value and store in Scoreboard
if(sti.value)
cov.sample();
end
endtask
endclass

unique array without using unique

Write a System Verilog code with a array (say with 20 elements) where all the array elements have unique numbers. The numbers can be any integer value.
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Answer:

module unique_array_element;
class array_ele;
  rand bit [7:0] data[];
  constraint data_values { foreach(data[i]) 
                             foreach(data[j])
                               if(i != j) data[i] != data [j] ;} 
endclass

  array_ele array_ele_obj;

  initial
  begin
     array_ele_obj = new();
     array_ele_obj.data = new[20];
     assert(randomize(array_ele_obj));
     foreach(array_ele_obj.data[i])
      $display("%d",array_ele_obj.data[i]);
  end
endmodule