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// 18-07-2014// 4bit binary up counter using behavioural modeling;module binary_counter (q,clk,rst,en);//output declarationoutput reg [3:0] q;//input declarationinput clk; //clockinput rst; // reset (active low)input en; // enable pin (active high)//body of codeinitial q <= 0;always @ (posedge clk, negedge rst, negedge en) if ((!rst) && en) q <= q+1; else q <= 0;endmodule
// 18-07-2014
ReplyDelete// 4bit binary up counter using behavioural modeling;
module binary_counter (q,clk,rst,en);
//output declaration
output reg [3:0] q;
//input declaration
input clk; //clock
input rst; // reset (active low)
input en; // enable pin (active high)
//body of code
initial q <= 0;
always @ (posedge clk, negedge rst, negedge en)
if ((!rst) && en)
q <= q+1;
else
q <= 0;
endmodule